Silicon Design Engineer Contract

AMD

MARKHAM, Canada

Job posting number: #7292955 (Ref:amd-55484)

Posted: November 5, 2024

Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING


We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 


AMD together we advance_

THE DEPARTMENT:
Our department is responsible for developing Standard Cell Libraries, supporting 3RD party Standard Cell Libraries for all AMD products, and in-house Process Characterization structures. These IPs must meet AMD’s performance, power, area, and cost requirements in state-of-the-art CMOS technologies. We are exposed to bleeding-edge technologies that few other companies will ever hear of. We play a major role in shaping AMD’s roadmap and future products.


THE ROLE:
This role is geared towards developing required stdcell library EDA (Electronic Design Automation) views, importing 3rd Party EDA views and qualifying them to work with the tools defined in AMD’s Synthesis and Place and Route flows. The role also drives local design innovation and improvement of critical standard cells that are contributing the most to best power/performance per area.


KEY RESPONSIBILITIES:
• Design and verify custom standard cells using analog design tools. Perform HSPICE/Spectre simulations for standard cells characterization.
• Design, develop and enhance the verification environment, including test benches for relevant EDA views (schematic/verilog/liberty views are some examples).
• Create, maintain and improve design flows and infrastructure systems.
• Benchmark 3rd party Standard Cell Libraries for performance, power, and area including through Synthesis and Place and Route.
IDEAL CANDIDATE WILL HAVE:
• Strong knowledge of CMOS integrated circuits. Working experience with HSPICE or Spectre and other CAD tools required for schematic/layout design.
• Experience with ASIC EDA tools used in synthesis, place and route, simulation, static timing analysis, test insertion, and formal verification.
• Experience with Hardware Description Languages such as Verilog.
• Successful development of verification test benches using ModelSim, VCS or NCSim.
• Proficient in UNIX (Linux) platforms
• A good understanding of UNIX, C, Perl, Tcl, SPICE, JavaScript and SKILL are assets.
ACADEMIC CREDENTIALS:
• BS in Electrical Engineering or equivalent.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.





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More Info

Job posting number:#7292955 (Ref:amd-55484)
Application Deadline:Open Until Filled
Employer Location:AMD
Santa Clara,California
United States
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